NIMCET Computer Architecture Previous Year Questions (PYQs) – Page 1 of 2

✅ Concept:

In modern processors, to improve performance, the CPU often overlaps the fetch, decode, and execute stages of multiple instructions. This overlapping is known as:

Instruction Pipelining

✅ Example:

• Instruction 1: Being executed
• Instruction 2: Being decoded
• Instruction 3: Being fetched

This overlapping allows multiple instructions to be processed simultaneously at different stages of the pipeline, improving throughput.

✅ Final Answer: $\boxed{\text{Instruction Pipelining}}$

✅ Concept:

The Accumulator is a special-purpose register used by the ALU to store intermediate results during arithmetic and logic operations.

✅ Explanation:

• It simplifies CPU design by reducing the number of memory accesses.
• Results of one operation are stored in the accumulator and used in the next.
• Widely used in simple or older CPU architectures.

✅ Final Answer: $\boxed{\text{Accumulator}}$

✅ Concept:

Cache memory is highly effective due to its ability to take advantage of the locality of reference. This refers to the tendency of programs to access a relatively small portion of memory repeatedly during execution.

✅ Explanation of Options:

• Memory Localization: Not the correct answer, as it's a general concept related to memory organization.
• Locality of Reference: The correct answer! This refers to the tendency of a program to repeatedly access the same memory locations, which cache memory leverages to speed up data access.
• Memory Size: Cache memory is small, and its size is actually one of the factors that makes it faster, but size alone does not determine its effectiveness.
• None of the Mentioned: This option is incorrect because "locality of reference" is the main reason cache memory is effective.

✅ Final Answer:

The most effective reason for cache memory is the $\boxed{\text{Locality of Reference}}$.

✅ Concept:

To fetch data from secondary memory, certain registers are used to handle the addresses and manage the data flow between secondary memory and the CPU.

✅ Explanation of Options:

• Program Counter (PC): The Program Counter holds the address of the next instruction to execute, not used for fetching data from secondary memory.
• Memory Address Register (MAR): This is the correct answer! The MAR holds the address in memory from which data will be fetched or written, including from secondary storage. It is responsible for managing the memory access.
• Memory Buffer Register (MBR): The MBR temporarily holds data being transferred to or from memory but does not directly fetch data from secondary memory.
• Accumulator: The Accumulator holds intermediate results of arithmetic or logical operations, not used for fetching data from secondary memory.

✅ Final Answer:

The register used to fetch data from secondary memory is the $\boxed{\text{Memory Address Register (MAR)}}$.

Register Responsible for Next Instruction

Question:
Which of the following registers is used to keep track of the address of the memory location where the next instruction is located?

✅ Correct Answer: Program Counter (PC)

Explanation:

The Program Counter (PC) holds the address of the next instruction to be fetched from memory and executed by the CPU. After fetching the current instruction, it automatically updates to point to the next one.

Final Answer: Program Counter